Notes on DTMF / INFRARED / PC-PARALLEL PORT / VCO /
DTMF TONE GENERATOR-um91215b
The objective of our project is to collect data such as process pressure, temperature, flow and level from the field and transmit this data to the control room as a digital signal through a wireless Infra-red (IR) transmitter. The thus received signal is fed to the controller (PC). The four bit controller output is encoded using a Dual Tone Multi-Frequency (DTMF) tone generator and is transmitted back to the field as a single beam control signal. In the field area, this signal is decoded by the DTMF tone decoder and the four-bit control signal is given to the final control element, which ultimately results in the control of the process variable that caused the disturbance in the system.
Our prototype consists of two distinct units
Introduction:
Actual trends in process control are determining an increase in complexity at each control level. Utilization of automatic analyzers, industrial controllers, PLC (Programmable Logic Controller) and industrial computers are rapidly increasing. The application of computer technology for supervision and control of technological processes has lead to a spectacular increase in the information acquired by these systems.
In modern days, the Distributed Control System plays a major role in most industries such as petrochemical, fertilizers, cement, sugar, etc. Each element of the DCS is connected through cables.
The main disadvantages encountered when cables are used are
The main objective of our prototype is to eliminate these cables
and to establish wireless remote data transfer between the field and the
control room. This is achieved using Infra Red transmitters and
photodiodes.
The signal from the field transmitter (that is in the range of (4 – 20) mA) is converted in to frequency signal and is transmitted using an Infra red transmitter to the control room. This signal is received in the control room using a photodiode and is fed to the PC (controller). The control output from the PC is encoded using a DTMF tone generator and the four bit control signal is transmitted as a single beam to the field. This single beam is again decoded in the field using a DTMF tone decoder and the control output is given to the final control element (a stepper motor in our case).
The main advantages of our prototype are
Temperature, a basic thermodynamic property of a substance, is determined by the amount of kinetic or heat energy in the substance. Increasing the kinetic energy in a substance will increase its temperature, while decreasing the kinetic energy will lower the substance's temperature. When two bodies at different temperatures are put into thermal contact, energy will be transferred from the warmer body to the colder body until the two bodies are at the same temperature.
If two bodies are in thermal equilibrium with each other, they are at the same temperature. If two bodies have equality of temperature with a third body, they in turn have equality of temperature with each other. This is the zeroth law of thermodynamics.
In order to be able to repeatedly and accurately report temperatures, standard temperature scales have been devised. The most common are the Fahrenheit and the Celsius scales. The relationship between these two scales is:
°F = 32 + (9/5)° C
In addition to the two common scales mentioned above, there are two absolute scales, the Rankine and Kelvin scales. These scales define temperatures independent of any particular substance
The English system for absolute temperature is the Rankine scale and is related to degrees F as follows:
°R = °F + 460
The international system for absolute temperature is the Kelvin scale and is related to degrees C as follows:
°K = °C + 273
TEMPERATURE SENSORS
Temperature is the most commonly measured variable in process control. As a result, there are proliferations of sensors and physical construction options. However, while the options are numerous, the optimum choice for a particular application depends on many factors.
THERMOCOUPLE
The industrial thermocouple is based on the principle that when two dissimilar metals are joined together, an electromotive force (EMF) will exist. If the circuit is closed, a current will flow as a result of the EMF. This principle of operation has made it possible to construct thermocouples capable of measuring a wide range of temperatures using different metal combinations.
Reference –
RESISTANCE TEMPERATURE DETECTOR (RTD) OPERATION
An RTD is based on the principle that the resistance of a conductor
varies with temperature. One of the most common conductors used in RTDs
is platinum, which provides a resistance of 100 ohms at 0 degrees C and
is the most repeatable and stable of all metals. An RTD is connected to
a transmitter that supplies a sense current and measures the RTD’s resistance.
The sense cur-rent is a small current passed through the RTD to generate
a voltage that can be read by the transmitter.
The objective of the design is to control a process plant remotely from a single centralized location. The signals from field are transmitted by wireless setups, received at a centralized control room and processed for necessary control actions. This eliminates the use of cables.
In the design, the signals are simulated using the VCO or the Voltage Controlled Oscillator. The VCO is a free running multivibrator and operates at a set frequency fo called free running frequency. An external timing capacitor and an external resistor determine this frequency. It can also be shifted to either side by applying a dc control voltage to an appropriate terminal of the IC. The frequency deviation is directly proportional to the dc control voltage and hence it is called a " Voltage Controlled Oscillator" or VCO.
The frequency signal generated by the VCO is transmitted using Infrared Transmitter, to the control room. Infrared beam systems are usually used in conditions in which high levels of ambient or background IR radiation already exists. To enable the systems to differentiate against this background radiation and provide good effective detection ranges, the transmitter beams are invariably frequency modulated, and the receivers are fitted with matching frequency detectors. This signal is received in the control room using a photoreceiver.
This signal is fed to the PC (controller) through the parallel port. Using the parallel port makes the prototype portable and compatible. The controller output available at the output lines of the parallel port is given to a quad bilateral switch through a buffer. The quad switch serves to short the columns and rows of the DTMF Encoder to generate the controller output (discussed in detail in ).
The encoded signal is transmitted back to the field as a single beam through the IR transmitter. This beam is received in the field and is decoded using a DTMF Decoder. This translates the encoded signal back into a four-bit output that can be used to drive a Stepper motor, which in our case is the final control element.
7805 VOLTAGE REGULATOR
The LM78XX series of three terminal regulators is available with several fixed output voltages making them useful in a wide range of applications. One of these is local on card regulation, eliminating the distribution problems associated with single point regulation. The voltages available allow these regulators to be used in logic systems, instrumentation, HiFi, and other solid-state electronic equipment. Although designed primarily as fixed voltage regulators these devices can be used with external components to obtain adjustable voltages and currents.
The LM78XX series is available in an aluminum TO-3 package that will allow over 1.0A load current if adequate heat sinking is provided. Current limiting is included to limit the peak output current to a safe value. Safe area protection for the output transistor is provided to limit internal power dissipation. If internal power dissipation becomes too high for the heat sinking provided, the thermal shutdown circuit takes over preventing the IC from overheating.
Considerable effort was expanded to make the LM78XX series of regulators easy to use and minimize the number of external components. It is not necessary to bypass the output, although this does improve transient response. Input bypassing is needed only if the regulator is located far from the filter capacitor of the power supply.
For output voltage other than 5V, 12V and 15V the LM117 series provides
an output voltage range from 1.2V to 57V.
FEATURES
General Description
The CD4046BC micro-power phase-locked loop (PLL) consists of a low power, linear, voltage-controlled oscillator (VCO), a source follower, a Zener diode, and two-phase comparators. The two-phase comparators have a common signal input and a common comparator input. The signal input can be directly coupled for a large voltage signal, or capacitively coupled to the self-biasing amplifier at the signal input for a small voltage signal. Phase comparator I, an exclusive OR gate, provides a digital error signal (phase comp. I Out) and maintains 90º ?phase shifts at the VCO center frequency. Between signal input and comparator input (both at 50% duty cycle), it may lock onto the signal input frequencies that are close to harmonics of the VCO center frequency. Phase comparator II is an edge-controlled digital memory network. It provides a digital error signal (phase comp. II Out) and lock-in signal (phase pulses) to indicate a locked condition and maintains 0 deg. ?phase shift between signal input and comparator input. The linear voltage-controlled oscillator (VCO) produces an output signal (VCO Out) whose frequency is determined by the voltage at the VCO IN input, and the capacitor and resistors connected to pin C1 A, C1 B, R1 and R2. The source follower output of the VCO IN (demodulator Out) is used with an external resistor of 10 K? or more. The INHIBIT input, when high, disables the VCO and source follower to minimize standby power consumption. The Zener diode is provided for power supply regulation, if necessary.
The most important part of the chip is the VCO section .The highly versatile
VCO produces a well-shaped symmetrical square-wave output, has a top-end
frequency limit in excess of 1MHz, has a voltage-to-frequency linearity
of about 1% and can be easily scanned through 1000000:1 range by an external
voltage applied to the VCO input terminal. The frequency of the oscillator
is governed by the value of capacitor (minimum value 50pF) connected between
pins 6 and 7, by the value of a resistor (minimum value 10 kilo-ohm) wired
between pin 11 and ground, and by the voltage applied to VCO input pin
9.
The figure shows the circuit of 4046B VCO used as a voltage-controlled square-wave generator. Here C1-R1 determines the maximum frequency that can be obtained (with the pin-9 voltage at maximum) and RV1 controls that actual frequency by applying a control voltage to pin 9: the frequency falls to a very low value with pin 9 at zero volts. The effective voltage-control range of pin 9 varies from roughly 1V below the supply value to about 1V above zero, and gives a frequency span of about 1000000:1.The frequency can be made to fall all the way to zero with zero input, by wiring high-value resistor R2 between pins 12 and 16. When the frequency is reduced to zero, the VCO output randomly settles in either a logic-0 or a logic-1 state. The VCO section of the 4046B can be disabled by taking pin 5 of the package high or enabled by taking pin 5 low. This feature makes it possible to gate the VCO on and off via external signals.
Features
Wireless Data communication Using IR LEDs
Introduction
In the past, remote control systems have mainly relied on Radio or Ultrasonic links to effect control. However, these methods have serious disadvantages. Radio links often require licensing, they can give excessive range and are prone to electrical interference. Ultrasonic links suffer from multipath interference which limits their useable data range, and interference from numerous everyday objects that produce sound at ultrasonic frequencies, such as keys, coins, bells, electrical apparatus etc. Infra-Red (IR) light links can be used for remote control and their freedom from many of these problems, in part, explains their rapidly growing popularity.
Generally, IR links consist of a modulation source driving a light emitting
diode that radiates at a wavelength of 850 to 970nm. This light is detected
by a photodiode, and the resulting signal is amplified and decoded to recover
the transmitted information. Since IR light is used, licensing is not required,
and electrical interference is easily rejected. Also, multipath interference
does not significantly degrade the signal, and there are very few domestic
light sources emitting IR that flicker at a frequency high enough to corrupt
a modulated signal. (Compact Fluorescent or "energy saving" lamps are a
possible problem, though manufacturers do try to avoid common IR data transmission
frequencies).
The main limitations of an optical system result from the low power output available from an IR light emitting diode (LED), combined with noise generated in the photodiode by current flowing in the device due to ambient lighting and leakage. These factors control the operational range of a system and the ambient light levels it can tolerate.
Using lenses to concentrate the IR LED’s light output can effectively increase the transmitted power, but this narrows the transmission beam width making alignment too critical for some applications. The receiver signal to noise ratio can be optimized by using a very low leakage, high sensitivity photodiode in conjunction with an optical filter, which only passes wavelengths emitted by IR light emitting diodes.
All Infra Red (IR) remote controllers use some kind of IR signal. The
controller transmits pulses of IR light to send the signal to the receiver.
These IR LEDs transmit light in the frequency range of 30 kHz to 40 kHz.
These high frequencies were chosen so that other light sources would not
interfere with the receiver’s ability to correctly receive the transmitted
signals. These signals are transmitted by the IR LED in some type of binary
code. It turns out that for most consumer electronics this coding is the
same. The binary signal varies in length for both time and bit length.
There are really only three different ways that manufacturers choose to code these signals. This coding is usually based on varying the length of pulses, varying the length of spaces between pulses or altering the order between spaces or pulses.
2) Space-Coded Signals vary the length of the spaces between pulses to code the information. In this case if the space width is short (approximately 550us) it corresponds to a logical zero or a low. If the space width is long (approximately 1650us) it corresponds to a logical one or a high.
3) Shift-Coded Signals vary the order of pulse space to code the information. In this case if the space width is short (approximately 550us) and the pulse width is long (approximately 1100us) the signal corresponds to a logical one or a high. If the space is long and the pulse is short the signal corresponds to a logical zero or a low.
When the control signal has to be transmitted, the IR LED sends a string of signals. The first piece of information in the string is called the Header. The Header usually contains a burst of highs that alerts all the IR receivers in the area to the string of data being sent. Following the burst of highs is the address to the specific machine to receive the next piece of data, the command. As long as the button is held down, (depressed) the command will continue to repeat over and over. When the button is released, a string of code called the stop is transmitted. As you may have guessed it the stop tells the machine to stop, it’s executing the command.
Parallel Port Interface Box is a simple device that connects to the PC's parallel port. Plugging this box into the printer port immediately interfaces PC to the outside world. For instance, one can connect motors to the box, and with the help of suitable computer programs, control them. All PCs have a parallel port and using the parallel port any piece of hardware can be interfaced to the computer.
The main advantages of using this port are:
The parallel port on the IBM PC is a 25-pin female port.
The parallel port has 4 function types for a total of 25 pins, viz., 8 data pins, 4 control pins, 5 status pins and 8 ground pins. The 8 data lines are used for 8 digital OUTPUT lines. For example, 8 different motors can be turned on. The 5 status lines are used for 5 digital INPUT lines. Thus 5 different sensors, like pushbuttons can be interfaced. The 4 control lines can be used for 4 additional digital output lines.
As shown in the diagram above, there are 8 digital output lines D0 to
D7. These are symbolized by a black arrowhead. There are also 4 additional
output lines: Strobe, LF/CR, Initialize, and Select/Deselect. These are
symbolized by a hollow arrowhead. These lines may require some additional
programming steps to use. These additional output lines can be avoided
if 8 output lines are sufficient .The Strobe line assures that the parallel
data on lines D0 to D7 are ready to be sent out simultaneously.
As shown 5 digital input lines are Printer Error, Online, Empty, Acknowledge
and Busy. These are symbolized by gray arrowheads. The circuit requires
an external 5 V source. The DB-25 connector pin numbers are those of the
male connector part. This connector will plug into the PC parallel port.
CMOS Hex Buffer/ Converters
The CD4050B devices are non-inverting hex buffers, respectively, and feature logic-level conversion using only one supply voltage (VCC ). The input-signal high level (VIH ) can exceed the V CC supply voltage when these devices are used for logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converters and can drive directly two DTL/TTL loads. (VCC = 5V, VOL £ 0.4V, and IOL ³ 3.3mA.).
Features
• CD4050B Non-Inverting
• High Sink Current for Driving 2 TTL Loads
• High-To-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1m A at 18V Over Full Package
Temperature Range; 100nA at 18V and 25° C
• 5V, 10V and 15V Parametric Ratings
Applications
• CMOS to DTL/TTL Hex Converter
• CMOS Current "Sink" or "Source" Driver
• CMOS High-To-Low Logic Level Converter
CD4066BC Quad Bilateral Switch
General Description
The CD4066BC is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with CD4016BC, but has a much lower "ON" resistance, and "ON" resistance is relatively constant over the input-signal range.
Features
General Description
This CMOS device provides low cost tone-dialing capability in microprocessor controlled telephone applications. 4-bit binary data is decoded directly, without the need for conversion to simulated keyboard inputs required by standard DTMF generators. With the TONE ENABLE input low, the oscillator is inhibited and the device is in a low power idle mode. On the low-to-high transition of TONE ENABLE, data is latched into the device and the selected tone pair from the standard DTMF frequencies is generated. An open-drain N-channel transistor provides a MUTE output during tone generation.
Features
* Direct microprocessor interface
* Binary data inputs with latches
* Generates 16 standard tone pairs
* On-chip 3.579545 MHz crystal-controlled oscillator
* Better than 0.64% frequency accuracy
* High group pre-emphasis
* Low harmonic distortion
* MUTE output interfaces to speech network
* Low power idle mode
* 3.3V±.8V operation
Functional Description
With the TONE ENABLE pin pulled low, the device is in a low power idle mode, with the oscillator inhibited and the output transistor turned off. Data on inputs D0±D3 is ignored until a rising transition on TONE ENABLE. Data meeting the timing specifications are latched in, the oscillator and output stage are enabled, and tone generation begins. The decoded data sets the high group and low group programmable counters to the appropriate divide ratios. These counters sequence two ratioed capacitor D/A converters through a series of 28 equal duration steps per sine wave cycle. On-chip regulators ensure good stability of tone amplitudes with variations in supply voltage and temperature. The two tones are summed by a mixer amplifier, with preemphasis applied to the high group tone. The output is an NPN emitter-follower requiring the addition of an external load resistor to VSS .
Pin Descriptions
V DD (Pin 1): This is the positive supply to the device, referenced to VSS . The collector of the TONE OUT transistor is also connected to this pin.
V SS (Pin 5): This is the negative voltage supply. All voltages are referenced to this pin.
OSC IN, OSC OUT (Pins 6 and 7): All tone generation timing is derived from the on-chip oscillator circuit. A low-cost 3.579545 MHz A-cut crystal (NTSC TV color-burst) is needed between pins 6 and 7. Load capacitors and a feedback resistor are included on-chip for good start-up and stability. The oscillator is stopped when the TONE ENABLE input is pulled to logic low.
TONE ENABLE Input (Pin 2): This input has an internal pull-up resistor. When TONE ENABLE is pulled to logic low, the oscillator is inhibited and the tone generators and output transistor are turned off. A low to high transition on TONE ENABLE latches in data from D0±D3. The oscillator starts, and tone generation continues until TONE ENABLE is pulled low again.
MUTE (Pin 8): This output is an open-drain N-channel device that sinks current to VSS when TONE ENABLE is low and no tones are being generated. The device turns off when TONE ENABLE is high.
D0, D1, D2, D3 (Pins 9, 10, 11, 12): These are the inputs for binary-coded data, which is latched in on the rising edge of TONE ENABLE. Data must meet the timing specifications. At all other times these inputs are ignored and may be multiplexed with other system functions.
TONE OUT (Pin 14): This output is the open emitter of an NPN transistor, the collector of which is connected internally to VDD . When an external load resistor is connected from TONE OUT to VSS , the output voltage on this pin is the sum of the high and low group tones superimposed on a DC offset. When not generating tones, this output transistor is turned off to minimize the device idle current.
SINGLE TONE ENABLE (Pin 3): This input has an internal pull-up resistor. When pulled to VSS , the device is in single tone mode and only a single tone will be generated at pin 14 (for testing purposes). For normal operation, leave this pin open-circuit or pull to VDD .
GROUP SELECT (Pin 4): This pin is used to select the high group or low group frequency when the device is in single tone mode. It has an internal pull-up resistor. Leaving this pin open-circuit or pulling it to V DD will generate the high group, while pulling to V SS will generate the low group frequency at the TONE OUT pin.
MT 8870D DTMF Tone Decoder
The MT8870D is a complete DTMF receiver integrating both the bandsplit filter and digital decoder functions. The filter section uses switched capacitor techniques for high and low group filters; the decoder uses digital counting techniques to detect and decode all 16 DTMF tone-pairs into a 4-bit code. External component count is minimized by on chip provision of a differential input amplifier, clock oscillator and latched three-state bus interface.
Features:
Filter Section
Separation of the low-group and high group tones is achieved by applying the DTMF signal to the inputs of two sixth-order switched capacitor bandpass filters, the bandwidths of which correspond to the low and high group frequencies. The filter section also incorporates notches at 350 and 440 Hz for exceptional dial tone rejection. Each filter output is followed by a single order switched capacitor filter section, which smooths the signals prior to limiting. Limiting is performed by high-gain comparators which are provided with hysteresis to prevent detection of unwanted low-level signals. The outputs of the comparators provide full rail logic swings at the frequencies of the incoming DTMF signals.
Decoder Section
Following the filter section is a decoder employing digital counting techniques to determine the frequencies of the incoming tones and to verify that they correspond to standard DTMF frequencies. A complex averaging algorithm protects against tone simulation by extraneous signals such as voice while basic steering circuit providing tolerance to small frequency deviations and variations. This averaging algorithm has been developed to ensure an optimum combination of immunity to talk-off and tolerance to the presence of interfering frequencies (third tones) and noise. When the detector recognizes the presence of two valid tones, (this is referred to as the "signal condition" in some industry specifications) the "Early Steering" (ESt) output will go to an active state. Any subsequent loss of signal condition will cause ESt to assume an inactive state (see "Steering Circuit").
Steering Circuit
Before registration of a decoded tone pair, the receiver checks for a valid signal duration (referred to as character recognition condition). This check is performed by an external RC time constant driven by ESt. A logic high on ESt causes v c (see Figure 4) to rise as the capacitor discharges. Provided signal condition is maintained (ESt remains high) for the validation period (tGTP), v c reaches the threshold (VTSt) of the steering logic to register the tone pair, latching its corresponding 4-bit code (see Table 1) into the output latch. At this point the GT output is activated and drives Vc to VDD. GT continues to drive high as long as ESt remains high. Finally, after a short delay to allow the output latch to settle, the delayed steering output flag (StD) goes high, signaling that a received tone pair has been registered. The contents of the output latch are made available on the 4-bit output bus by raising the three state control input (TOE) to a logic high. The steering circuit works in reverse to validate the interdigit pause between signals. Thus, as well as rejecting signals too short to be considered valid, the receiver will tolerate signal interruptions (dropout) too short to be considered a valid pause. This facility, together with the capability of selecting the steering time constants externally, allows the designer to tailor performance to meet a wide variety of system requirements.
Guard Time Adjustment
In many situations not requiring selection of tone duration and interdigital pause, the simple steering circuit shown in Figure 4 is applicable. Component values are chosen according to the formula:
t REC = t DP + t GTP
t ID = t DA + t GTA
The value of t DP is a device parameter and t REC is the minimum signal duration to be recognized by the receiver. A value for C of 0.1 mF is recommended for most applications, leaving R to be selected by the designer. Different steering arrangements may be used to select independently the guard times for tone present (t GTP ) and tone absent (t GTA ). This may be necessary to meet system specifications which place both accept and reject limits on both tone duration and interdigital pause. Guard time adjustment also allows the designer to tailor system parameters such as talk off and noise immunity. Increasing t REC improves talk-off performance since it reduces the probability that tones simulated by speech will maintain signal condition long enough to be registered. Alternatively, a relatively short t REC with a long t DO would be appropriate for extremely noisy environments where fast acquisition time and immunity to tone drop-outs are required.
Power-down and Inhibit Mode
A logic high applied to pin 6 (PWDN) will power down the device to minimize the power consumption in a standby mode. It stops the oscillator and the functions of the filters.
Inhibit mode is enabled by a logic high input to the pin 5 (INH). It inhibits the detection of tones representing characters A, B, C, and D. The output code will remain the same as the previous detected code (see Table 1).
Differential Input Configuration
The input arrangement of the MT8870D provides a differential-input operational amplifier as well as a bias source (V Ref ) which is used to bias the inputs at mid-rail. Provision is made for connection of a feedback resistor to the op-amp output (GS) for adjustment of gain. In a single-ended configuration, the input pins are connected as shown in Figure 10 with the op-amp connected for unity gain and V Ref biasing the input at 1/2 V DD . Figure 6 shows the differential configuration, which permits the adjustment of gain with the feedback resistor R 5 .
Crystal Oscillator
The internal clock circuit is completed with the addition of an external 3.579545 MHz crystal and is normally connected as shown in Figure 10 (Single-Ended Input Configuration). However, it is possible to configure several MT8870D devices employing only a single oscillator crystal. The oscillator output of the first device in the chain is coupled through a 30 þF capacitor to the oscillator input (OSC1) of the next device. Subsequent devices are connected in a similar fashion. The problems associated with unbalanced loading are not a concern with the arrangement shown, i.e., precision balancing capacitors are not required.
In microprocessor-controlled telephone applications. 4-bit binary data is decoded directly, without the need for conversion to simulated keyboard inputs required by standard DTMF generators. With the TONE ENABLE input low, the oscillator is inhibited and the device is in a low power idle mode. On the low-to-high transition of TONE ENABLE, data is latched into the device and the selected tone pair from the standard DTMF frequencies is generated. An open-drain N-channel transistor provides a MUTE output during tone generation.
2803 BUFFER AMPLIFIER
The ULN2803A high voltage, high current Darlington arrays are suited for interfacing between low-level logic circuitry and multiple peripheral power loads. It has eight drivers and features continuous load ratings to 600mA for each of the eight drivers. Typical power loads totaling over 300W can be controlled at an appropriate duty cycle depending on ambient temperature and number of drivers turned ON simultaneously. Typical loads include relays, solenoids, stepper motors, multiplexed LED and incandescent displays and heaters.
ULN 2803 has series input resistors selected for operation directly with 5V TTL or CMOS. These devices will handle numerous interface needs -particularly those beyond the capabilities of standard logic buffers. ULN 2803 is the standard Darlington array. The outputs are capable of sinking 500 mA and will withstand at least 50V in the OFF state. Outputs may be paralleled for higher load current capability.
The ULN2803 Darlington array is furnished with 18-pin dual in-line plastic packages and all devices are pinned with outputs opposite inputs to facilitate ease of circuit board layout.
FEATURES